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TMPR3916 Datasheet(PDF) 81 Page - Toshiba Semiconductor

Part # TMPR3916
Description  32-Bit TX System RISC TX39 Family TMPR3916
PDF  225 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR3916 Datasheet(HTML) 81 Page - Toshiba Semiconductor

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Chapter 3 Graphics Display Controller (GDC)
Preliminary
3-2
3.1
GDC Structure
3.1.1
Display Screen
The TMPR3916 can display four layers, overlaid in the following order: A/E, B, C and D. Top layer
is D (see Figure 3.1.1). Displaying layers A and E together is not possible because these layers use the
same resources except for color palette and dot buffer.
The blank signal BLK enables the display data output. The layer active signals LA, LB, LC and LD
activate each layer.
Layer D screen size can be set independently of the other layer sizes.
Layer A can be switched between Map mode and Picture mode (then called layer E). Use the LPA bit
of the display control register (DCR) to switch the modes.
Layer A/E
Layer B
Layer C
Layer D
LA, LPA data A/E:
Layer A/E displayed
LB data B:
(0),
1
Layer B displayed
LC data C:
(0),
1
Layer C displayed
LD data D:
(0),
1
Layer D displayed
Next layer displayed
Next layer displayed
Next layer displayed
Lx data x = 1
: Display
Lx data x = 0
: No display (transparent)
Lx
: Bit in display control register
data x
: Layer x display data
x
: A/E, B, C, D
Figure 3.1.1 Layer Arrangement
As can be seen in the figure above layer A/E will always be displayed if all other activated layers
contain transparent dots at the current location. Therefore it is recommended to always use one of these
two layers to prevent the system from reading dots in an undefined background.
For display dimensions the following restrictions apply: Layers A/E, B and C shall be configured at
least 64 dots wide horizontally, layer D should have 16 dots minimum. In vertical direction no
restriction exists.



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