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HD64F36049 Datasheet(PDF) 213 Page - Renesas Technology Corp |
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HD64F36049 Datasheet(HTML) 213 Page - Renesas Technology Corp |
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213 / 562 page ![]() Section 13 Timer W Rev. 3.00 Mar. 15, 2006 Page 181 of 526 REJ09B0060-0300 Section 13 Timer W The timer W is a 16-bit timer having output compare and input capture functions. Timer W can count external events and output pulses with an arbitrary duty cycle by compare match between the timer counter and four general registers. Thus, it can be applied to various systems. 13.1 Features • Selection of five counter clock sources: four internal clocks (φ, φ/2, φ/4, φ/8) and an external clock (external events can be counted) • Capability to process up to four pulse outputs or four pulse inputs • Four general registers: Independently assignable output compare or input capture functions Usable as two pairs of registers; one register of each pair operates as a buffer for the output compare or input capture register • Timer input/output functions Waveform output by compare match: Selection of 0 output, 1 output, or toggle output Input capture function: Rising edge, falling edge, or both edges Counter clearing function: Counters can be cleared by compare match PWM mode: Up to three-phase PWM output can be provided with desired duty ratio. • Any initial timer output value can be set • Five interrupt sources Four compare match/input capture interrupts and an overflow interrupt. |
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