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HD64F36049 Datasheet(PDF) 215 Page - Renesas Technology Corp |
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HD64F36049 Datasheet(HTML) 215 Page - Renesas Technology Corp |
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215 / 562 page  Section 13 Timer W Rev. 3.00 Mar. 15, 2006 Page 183 of 526 REJ09B0060-0300 Internal clock: External clock: FTCI FTIOA FTIOB FTIOC FTIOD IRRTW Control logic Clock selector Comparator Internal data bus [Legend] TMRW: TCRW: TIERW: TSRW: TIOR: TCNT: GRA: GRB: GRC: GRD: Timer mode register W (8 bits) Timer control register W (8 bits) Timer interrupt enable register W (8 bits) Timer status register W (8 bits) Timer I/O control register (8 bits) Timer counter (16 bits) General register A (input capture/output compare register: 16 bits) General register B (input capture/output compare register: 16 bits) General register C (input capture/output compare register: 16 bits) General register D (input capture/output compare register: 16 bits) φ φ/2 φ/4 φ/8 Figure 13.1 Block Diagram of Timer W |
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