HD64F36049 datasheet(217/562 Pages) RENESAS

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Section 13 Timer W

Rev. 3.00 Mar. 15, 2006 Page 185 of 526

REJ09B0060-0300

13.3.1

Timer Mode Register W (TMRW)

TMRW selects the general register functions and the timer output mode.

Bit

Bit Name

Initial

Value

R/W

Description

CTS

R/W

Counter Start

The counter operation is halted when this bit is 0; while

it can be performed when this bit is 1.



Reserved

This bit is always read as 1.

BUFEB

R/W

Buffer Operation B

Selects the GRD function.

0: GRD operates as an input capture/output compare

1: GRD operates as the buffer register for GRB

BUFEA

R/W

Buffer Operation A

Selects the GRC function.

0: GRC operates as an input capture/output compare

1: GRC operates as the buffer register for GRA



Reserved

This bit is always read as 1.

PWMD

R/W

PWM Mode D

Selects the output mode of the FTIOD pin.

0: FTIOD operates normally (output compare output)

1: PWM output

PWMC

R/W

PWM Mode C

Selects the output mode of the FTIOC pin.

0: FTIOC operates normally (output compare output)

1: PWM output

PWMB

R/W

PWM Mode B

Selects the output mode of the FTIOB pin.

0: FTIOB operates normally (output compare output)

1: PWM output

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