SH7101 datasheet(372/486 Pages) RENESAS

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11. A/D Converter

Rev.2.00 Sep. 27, 2007 Page 338 of 448

REJ09B0394-0200

11.5

Interrupt Sources

The A/D converter generates an A/D conversion end interrupt (ADI) upon the completion of A/D

conversion. ADI interrupt requests are enabled when the ADIE bit is set to 1 while the ADF bit in

ADCSR is set to 1 after A/D conversion is completed.

The A/D converter can generate an A/D conversion end interrupt request. The ADI interrupt can

be enabled by setting the ADIE bit in the A/D control/status register (ADCSR) to 1, or disabled by

clearing the ADIE bit to 0.

Table 11.5

A/D Converter Interrupt Source

Name

Interrupt Source

Interrupt Source Flag

ADI

A/D conversion completed

ADF

11.6

Definitions of A/D Conversion Accuracy

This LSI's A/D conversion accuracy definitions are given below.

• Resolution

The number of A/D converter digital output codes

• Quantization error

The deviation inherent in the A/D converter, given by 1/2 LSB (see figure 11.5).

• Offset error

The deviation of the analog input voltage value from the ideal A/D conversion characteristic

when the digital output changes from the minimum voltage value B'0000000000 (H'00) to

B'0000000001 (H'01) (see figure 11.6).

• Full-scale error

The deviation of the analog input voltage value from the ideal A/D conversion characteristic

when the digital output changes from B'1111111110 (H'3FE) to B'1111111111 (H'3FF) (see

figure 11.6).

• Nonlinearity error

The error with respect to the ideal A/D conversion characteristic between zero voltage and full-

scale voltage. Does not include offset error, full-scale error, or quantization error (see figure

11.6).

• Absolute accuracy

The deviation between the digital value and the analog input value. Includes offset error, full-

scale error, quantization error, and nonlinearity error.

SH7101 Datasheet(PDF) 372 Page - Renesas Technology Corp