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SH7101 Datasheet(PDF) 167 Page - Renesas Technology Corp |
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SH7101 Datasheet(HTML) 167 Page - Renesas Technology Corp |
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167 / 486 page ![]() 8. Multi-Function Timer Pulse Unit (MTU) Rev.2.00 Sep. 27, 2007 Page 133 of 448 REJ09B0394-0200 8.3.12 Timer Gate Control Register (TGCR) TGCR is an 8-bit readable/writable register that controls the waveform output necessary for brushless DC motor control in reset-synchronized PWM mode/complementary PWM mode. These register settings are ineffective for anything other than complementary PWM mode/reset- synchronized PWM mode. Bit Bit Name Initial value R/W Description 7 ⎯ 0 R Reserved This bit is always read as 1. Only 1 should be written to this bit. 6 BDC 0 R/W Brushless DC Motor This bit selects whether to make the functions of this register (TGCR) effective or ineffective. 0: Ordinary output 1: Functions of this register are made effective 5 N 0 R/W Reverse Phase Output (N) Control This bit selects whether the level output or the reset- synchronized PWM/complementary PWM output while the reverse pins (TIOC3D, TIOC4C, and TIOC4D) are on-output. 0: Level output 1: Reset synchronized PWM/complementary PWM output 4 P 0 R/W Positive Phase Output (P) Control This bit selects whether the level output or the reset- synchronized PWM/complementary PWM output while the positive pin (TIOC3B, TIOC4A, and TIOC4B) are on- output. 0: Level output 1: Reset synchronized PWM/complementary PWM output |
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