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SH7101 Datasheet(PDF) 169 Page - Renesas Technology Corp |
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SH7101 Datasheet(HTML) 169 Page - Renesas Technology Corp |
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169 / 486 page ![]() 8. Multi-Function Timer Pulse Unit (MTU) Rev.2.00 Sep. 27, 2007 Page 135 of 448 REJ09B0394-0200 8.3.13 Timer Subcounter (TCNTS) TCNTS is a 16-bit read-only counter that is used only in complementary PWM mode. The initial value is H'0000. Note: Accessing the TCNTS in 8-bit units is prohibited. Always access in 16-bit units. 8.3.14 Timer Dead Time Data Register (TDDR) TDDR is a 16-bit register, used only in complementary PWM mode, that specifies the TCNT_3 and TCNT_4 counter offset values. In complementary PWM mode, when the TCNT_3 and TCNT_4 counters are cleared and then restarted, the TDDR register value is loaded into the TCNT_3 counter and the count operation starts. The initial value is H'FFFF. Note: Accessing the TDDR in 8-bit units is prohibited. Always access in 16-bit units. 8.3.15 Timer Period Data Register (TCDR) TCDR is a 16-bit register used only in complementary PWM mode. Set half the PWM carrier sync value as the TCDR register value. This register is constantly compared with the TCNTS counter in complementary PWM mode, and when a match occurs, the TCNTS counter switches direction (decrement to increment). The initial value is H'FFFF. Note: Accessing the TCDR in 8-bit units is prohibited. Always access in 16-bit units. 8.3.16 Timer Period Buffer Register (TCBR) The timer period buffer register (TCBR) is a 16-bit register used only in complementary PWM mode. It functions as a buffer register for the TCDR register. The TCBR register values are transferred to the TCDR register with the transfer timing set in the TMDR register. The initial value is H'FFFF. Note: Accessing the TCBR in 8-bit units is prohibited. Always access in 16-bit units. |
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