SH7101 datasheet(172/486 Pages) RENESAS

172 / 486 page

8. Multi-Function Timer Pulse Unit (MTU)

Rev.2.00 Sep. 27, 2007 Page 138 of 448

REJ09B0394-0200

Free-Running Count Operation and Periodic Count Operation: Immediately after a reset, the

MTU's TCNT counters are all designated as free-running counters. When the relevant bit in TSTR

is set to 1 the corresponding TCNT counter starts up-count operation as a free-running counter.

When TCNT overflows (from H'FFFF to H'0000), the TCFV bit in TSR is set to 1. If the value of

the corresponding TCIEV bit in TIER is 1 at this point, the MTU requests an interrupt. After

overflow, TCNT starts counting up again from H'0000.

Figure 8.4 illustrates free-running counter operation.

TCNT value

H'FFFF

H'0000

CST bit

TCFV

Time

Figure 8.4 Free-Running Counter Operation

When compare match is selected as the TCNT clearing source, the TCNT counter for the relevant

channel performs periodic count operation. The TGR register for setting the period is designated

as an output compare register, and counter clearing by compare match is selected by means of bits

CCLR0 to CCLR2 in TCR. After the settings have been made, TCNT starts up-count operation as

a periodic counter when the corresponding bit in TSTR is set to 1. When the count value matches

the value in TGR, the TGF bit in TSR is set to 1 and TCNT is cleared to H'0000.

If the value of the corresponding TGIE bit in TIER is 1 at this point, the TPU requests an interrupt.

After a compare match, TCNT starts counting up again from H'0000.

SH7101 Datasheet(PDF) 172 Page - Renesas Technology Corp