3886 datasheet(249/380 Pages) RENESAS

249 / 380 page

2-132

3886 Group User’s Manual

APPLICATION

2.9 Bus interface

Port control register 2

b7b6b5b4b3b2b1b0

Function

At reset

Name

Port control register 2 (PCTL2) [Address 2F 16]

Port output P42/P43 clear

function selection bit

P4 input level selection bit

(P42–P46)

0: Automatic set “0116” to timer 1

and “FF16” to prescaler 12

1: No automatic set

P8 function selection bit

0: CMOS level input

1: TTL level input

P7 input level selection bit

(P70–P75)

P4 output structure selection bit

(P42, P43, P44, P46)

INT2, INT3, INT4 interrupt

switch bit

Timer Y count source

selection bit

Oscillation stabilizing time set

after STP instruction released

bit

0: CMOS level input

1: TTL level input

0: CMOS

1: N-channel open-drain

0: Port P8/Port P8 direction

1: Port P4 input register/Port P7

input register

0: INT20, INT30, INT40 interrupt

1: INT21, INT31, INT41 interrupt

0: f(XIN)/16 (f(XCIN)/16 in low-

speed mode)

1: f(XCIN)

0: Only software clear

1: Software clear and output data

bus buffer 0 reading

(system bus side)

Fig. 2.9.8 Structure of Port control register 2

3886 Datasheet(PDF) 249 Page - Renesas Technology Corp

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