32182 datasheet(109/755 Pages) RENESAS

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4-14

EIT

32182 Group User’s Manual (Rev.1.0)

(3) Saving the PC

The PC value of the instruction that generated the FPE exception + 4 is set in the BPC register.

Because all of the instructions that generate an FPE exception are 32 bits long, the address to which the

RTE returns is always the instruction next to the one that generated the FPE exception.

(4) Branching to the EIT vector entry

The CPU branches to the address H’0000 0090 in the user space. This is the last operation performed in

hardware preprocessing.

(5) Jumping from the EIT vector entry to the user-created handler

The CPU executes the BRA instruction written by the user at the address H’0000 0090 of the EIT vector

entry to jump to the start address of the user-created handler. At the beginning of the user-created EIT

handler, first save the BPC, PSW and FPSR registers and the necessary general-purpose registers to the

stack.

(6) Returning from the EIT handler

At the end of the EIT handler, restore the saved registers from the stack and execute the RTE instruction.

When the RTE instruction is executed, hardware postprocessing is automatically performed.

4.8 Exception Processing

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