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7480 Datasheet(PDF) 106 Page - Renesas Technology Corp

Part # 7480
Description  8-BIT SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 7470 SERIES
PDF  337 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7480 Datasheet(HTML) 106 Page - Renesas Technology Corp

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7480 Group and 7481 Group User's Manual
1-89
1.12 Timer X and Timer Y
HARDWARE
When the timer X or Y write control bit is ‘0’, the CNTR pin output is initialized to HIGH by a write
to the timer (“ in Figure 1.12.24). When it is ‘1’, however, the CNTR pin output level cannot be
initialized by a write to the timer. In the PWM mode, when the low-order byte of the timer becomes
‘0116’ in the LOW level of the PWM output (” in Figure 1.12.24), or when the high-order byte
becomes ‘0116’ in the HIGH level of the PWM output (• in Figure 1.12.24), an underflow occurs in
each timer at the subsequent rising edge of the count source and the output level of the CNTR pin
is inverted.
When ‘TLL (0016 through FF16)’ is written to the low-order byte of the timer and ‘TLH (0016 through
FF16)’ to the high-order byte, the duty cycle of the PWM waveform output from the CNTR pin is
expressed by ‘TLH/(TLH + TLL)’.
Notes 1: • All of the PWM outputs are HIGH when TLL = 0016 and TLH
≠ 0016.
• All of the PWM outputs are LOW when TLH = 0016.
2: When at least one of TLL and TLH is ‘0016’, no timer interrupt request can be generated.
3: Even when value ‘0016’ is written to a timer, the timer continues counting down. Therefore,
the contents of the timer are undefined.
Figure 1.12.24 Operation Example in PWM Mode
RL
Count source
0016
TLH
Timer X stop
control bit
CNTR0 pin output
Writing to timer X
(high-order) (Note)
Time
Count start
Count stop
T
Count start
Timer X interrupt
request bit
1
A
A
2
4
6
7
5
UF
UF
8
Note: In this case, timer X write control bit is ‘0’ (writing to timer and timer latch simultaneously).
TLH
TLL
T
HH
HL
: Setting value to timer X (high-order)
: Setting value to timer X (low-order)
: PWM period T(s)=HH + HL
: Pulse width (HIGH-period)
: Pulse width (LOW-period)
A
: Clearing by writing ‘0’ to interrupt request bit or accepting interrupt request
HH(s) =
1
Count source frequency ×
Setting value to timer X (high-order)
TLL
Time
1
0016
RL
RL
RL
RL
UF
UF
UF
RL
HH
HL
HL(s) =
× Setting value to timer X (low-order)
10
9
RL
UF
: Contents of timer latch is reloaded
: Underflow
A
UF
UF
Writing to timer X
(low-order) (Note)
Undefined
‘0’ is written
‘0’ is written
‘1’ is written
Initialized to HIGH when
writing to timer X (Note)
RL
0116
0116
3
1
Count source frequency



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