7480 datasheet(107/337 Pages) RENESAS

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7480 Group and 7481 Group User's Manual

1-90

1.12 Timer X and Timer Y

HARDWARE

(2)

Setting of PWM Mode

Figures 1.12.25 and 1.12.26 show the setting of the PWM mode.

Figure 1.12.25 Setting of PWM Mode (1)

Timer X count stop (when timer X is used)

Timer Y count stop (when timer Y is used)

Procedure 1 Stop of timer count

Timer XY control register (TXYCON) [Address 00F816]

PWM mode (Note 3)

Timer X write control

0: Writing to latch and timer simultaneously

1: Writing to only latch

Procedure 3 Setting timer mode register

Timer X mode register (TXM) [Address 00F616]

• when timer X is used

Timer X count source selection

00: f(XIN)/2

01: f(XIN)/8

10: f(XIN)/16

11: Not available

PWM mode (Note 3)

Timer Y write control

0: Writing to latch and timer simultaneously

1: Writing to only latch

Timer Y mode register (TYM) [Address 00F716]

• when timer Y is used

Timer Y count source selection

00: f(XIN)/2

01: f(XIN)/8

10: f(XIN)/16

11: Not available

: ‘Not implemented’.

Notes 1: Pay attention to the output level of CNTR pin.

2: In the 7480 Group, these bits are not implemented.

Port P40 output mode (when timer X is used)

Port P41 output mode (when timer Y is used)

Port P4 direction register (P4D) [Address 00C916]

Procedure 2 Setting CNTR pin output (Setting the port pin which has the alternative function of CNTR pin to

output mode) (Note 1)

(Note 2)

Notes 3: When setting operation mode, CNTR pin output is

initialized to HIGH.

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