7480 datasheet(111/337 Pages) RENESAS

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7480 Group and 7481 Group User's Manual

1-94

1.12 Timer X and Timer Y

HARDWARE

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In Programmable One-Shot Output Mode

When the timer X or Y operation mode bits are set to the programmable one-shot output mode, the

CNTR pin outputs are initialized to the content of the CNTR edge selection bit.

The output level of a CNTR pin is inverted when the CNTR edge selection bit is switched.

Keep the trigger widths input to the INT pins 250 ns or more.

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In PWM Mode

When the timer X or Y write control bit is ‘0’, the CNTR pin output is initialized to HIGH by a write

to the timer. When the write control bit is ‘1’, the CNTR pin output level cannot be initialized by a

write to the timer.

All of the PWM outputs are HIGH when TLL = 0016 and TLH

≠ 0016.

All of the PWM outputs are LOW when TLH = 0016.

When at least one of TLL and TLH is ‘0016’, no timer interrupt request can be generated.

Even when value ‘0016’ is written to a timer, the timer continues counting down. Therefore, the

contents of the timer are undefined.

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I/O Port Pins P40 and P41 with the Alternative Functions of Timer I/O Pins CNTR0 and CNTR1

Port pins P40 and P41 have the alternative functions of 16-bit timer I/O pins CNTR0 and CNTR1

respectively. If the timer X or Y operation mode bit of the corresponding timer is set to any mode

related to output (Note), these pins cannot perform the normal function as output port pins. Refer to

Figure 1.10.3 Block Diagrams of Port Pins P2i to P5i in Section 1.10. Input/Output Pins.

Note: Modes related to output:

• Pulse output mode

• Programmable waveform generation mode

• Programmable one-shot output mode

• PWM mode

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Edge Polarity Selection Register

When the edge polarity selection bit of edge polarity selection register is set, the interrupt request

bit may be set to ‘1’.

Refer to Section 1.11.7 (2) in 1.11 Interrupts.

7480 Datasheet(PDF) 111 Page - Renesas Technology Corp