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7480 Datasheet(PDF) 112 Page - Renesas Technology Corp |
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7480 Datasheet(HTML) 112 Page - Renesas Technology Corp |
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112 / 337 page ![]() 7480 Group and 7481 Group User's Manual 1-95 HARDWARE 1.13 Timer 1 and Timer 2 1.13 Timer 1 and Timer 2 The 7480 Group and 7481 Group have two 8-bit timers with 8-bit latches: • Timer 1 • Timer 2 Timer 1 or timer 2 can select the following operation modes by the timer 1 or 2 operation mode bit of the timer 1 mode register (address 00F916) or the timer 2 mode register (address 00FA16): • Timer mode • Programmable waveform generation mode For details, refer to the section of each mode. 1.13.1 Block Diagram Figure 1.13.1 shows the block diagram of timer 1 and timer 2. Figure 1.13.1 Block Diagram of Timer 1 and Timer 2 1.13.2 Registers Associated with Timer 1 and Timer 2 Figure 1.13.2 shows the memory map of the registers associated with timer 1 and timer 2. Figure 1.13.2 Memory Map of Registers Associated with Timer 1 and Timer 2 00F416 00F516 00F916 00FA16 Timer 1 (T1) Timer 2 (T2) Timer 1 mode register (T1M) Timer 2 mode register (T2M) f(XIN)/64 f(XIN)/8 f(XIN)/128 TL f(XIN)/256 T0, T1 output T D Q Timer mode register 8 8 8 8 T Timer stop control bit Timer count source selection bits Timer interrupt request bit Output level latch Data bus Data bus ‘00’ ‘01’ ‘10’ ‘11’ |
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