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7480 Datasheet(PDF) 129 Page - Renesas Technology Corp |
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7480 Datasheet(HTML) 129 Page - Renesas Technology Corp |
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129 / 337 page  7480 Group and 7481 Group User's Manual 1-112 1.14 Serial I/O HARDWARE (4) UART Control Register This register controls the data transmission formats in clock asynchronous serial I/O (UART). This register is valid only when UART is selected. Figure 1.14.5 shows the UART control register. UART control register b5 b6 b7 b4 b3 b2 b1 b0 b Name Function At reset 1 2 3 4 5 6 7 00 0 0 0 1 1 1 1 UART control register (UARTCON) [Address 00E316] Character length selection bit (CHAS) Parity enable bit (PARE) Parity selection bit (PARS) Stop bit length selection bit (STPS) 0 : 8 bits 1 : 7 bits 0 : Parity disabled 1 : Parity enabled 0 : Even parity 1 : Odd parity 0 : 1 stop bit 1 : 2 stop bits These bits are fixed to ‘1’. 1 1 1 1 RW O O O 1 O 1 1 1 O O O × O × × × Figure 1.14.5 UART Control Register |
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