7480 datasheet(156/337 Pages) RENESAS

156 / 337 page

7480 Group and 7481 Group User's Manual

1-139

HARDWARE

(2)

Operations of Bus Arbitration

Operations of bus arbitration in the serial I/O communications are described below.

Bus Collision Detection

The level of serial I/O transmit pin TxD is compared with that of serial I/O receive pin RxD, synchronized

with rising edges of the synchronous clock which is used in serial I/O communications.

• The level of 8-bit transmit data is referred for comparison in clock synchronous serial I/O.

• The levels of all transmitted bits, from the start to the stop bits, are referred for comparison in

UART.

Bus Arbitration Interrupt

When a mismatch results from the comparison of the level of the TxD pin with that of the RxD pin

in bus collision detection, the bus arbitration interrupt request bit of interrupt request register 1 is set

to ‘1’; then the interrupt request is generated.

Figure 1.14.25 shows a timing of bus collision detection.

Figure 1.14.25 Timing of Bus Collision Detection

1.14 Serial I/O

Synchronous clock

TxD pin

RxD pin

Bus arbitration interrupt

request bit

Bus arbitration

A : Clearing by writing ‘0’ to the bus arbitration interrupt request bit or

accepting a bus arbitration interrupt request.

7480 Datasheet(PDF) 156 Page - Renesas Technology Corp