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7480 Datasheet(PDF) 229 Page - Renesas Technology Corp

Part # 7480
Description  8-BIT SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 7470 SERIES
PDF  337 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7480 Datasheet(HTML) 229 Page - Renesas Technology Corp

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7480 Group and 7481 Group User's Manual
2-14
APPLICATIONS
2.2 Timer X and Timer Y
2.2.6 Application Example of Programmable Waveform Generation Mode
Control of Motorcycle Single-Cylinder Engine
POINT: A trigger input to the INT pin automatically starts a timer counting. This allows the CNTR pin
output to be changed with a more accurate timing than counting is started in an INT interrupt
service routine.
SPECIFICATIONS:
Clock: f(XIN) = 8 MHz
A rise-to-rise period of a crank angle signal input to the CNTR0 pin is measured
using the pulse period measurement mode of timer X to determine the correction
value of timer Y.
The trigger of the crank angle signal input to the INT1 pin makes timer Y
activated. Then, the control signal of the igniter is output from the CNTR1 pin
using the programmable waveform generation mode.
For the pulse period measurement of the crank angle signal, refer to Section 2.2.4 Application
Example of Pulse Period Measurement Mode.
Figure 2.2.14 shows a peripheral circuit example.
Figure 2.2.15 shows an operation timing example.
Figure 2.2.16 shows a control procedure example of motorcycle engine.
Figure 2.2.15 Operation Timing Example
INT1 pin input
CNTR0 pin input
(Crank angle signal)
CNTR1 pin output
(Igniter control signal)
000016
Initial
value
RL
RL
RL
RL
UF
Timer Y
output
level latch
3
T
T
TL0
TL1
: Measured with pulse period measurement mode of timer X
: The written value to timer Y to correct HIGH output time of
the CNTR1 pin (determined by measured value T).
: The written value to timer Y to output LOW time of the CNTR1 pin
(determined by measured value T).
UF
UF
UF
Timer Y activated
Timer Y activated
Timer Y activated
4
RL
RL
UF
UF
UF
RL
: Underflow
: Reload
UF
RL
TL0 set 1
TL1set 2
Count stop 5
Initial value set 6
Figure 2.2.14 Peripheral Circuit Example
7480 Group
7481 Group
P31/INT1
P40/CNTR0
Phase control signal
Igniter
Motorcycle single-cylinder engine
P41/CNTR1
Crank angle input



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