AT91SAM9G20 datasheet(79/832 Pages) ATMEL

79 / 832 page

6384D–ATARM–04-May-09

AT91SAM9G20 Preliminary

Figure 13-6. Serial Flash Download

13.6

DataFlash Boot Sequence

The DataFlash boot looks for a valid application in the SPI DataFlash memory.

SPI0 is configured in master mode to generate a SPCK at 8 MHz. DataFlash shall be connected

to NPCS0 or NPCS1.

The DataFlash boot reads the DataFlash flash status register (Instruction code 0xD7). The Data-

Flash is considered as ready if bit 7 of the returned status register is set.

If no DataFlash is connected or if it does not answer, DataFlash boot exits after 1000 attempts.

If the DataFlash is ready, DataFlash boot reads the first 8 words into SRAM (Instruction code

“Continuous Read Array” 0x0b) and checks if it corresponds to valid exception vectors according

to the Valid Image detection algorithm.

End

Read the first 8 instructions (0x0b).

Decode the sixth ARM vector

Yes

Read the SerialFlash into the internal SRAM.

(code size to read in vector 6)

Restore the reset value for the peripherals.

Set the PC to 0 and perform the REMAP

to jump to the downloaded application

Send status command (0x05)

8 vectors

(except vector 6) are LDR

or Branch instruction

Yes

Start

Is status OK ?

Jump to next boot

solution

AT91SAM9G20 Datasheet(PDF) 79 Page - ATMEL Corporation