AT91SAM9G20 datasheet(27/832 Pages) ATMEL

27 / 832 page

6384D–ATARM–04-May-09

AT91SAM9G20 Preliminary

Figure 9-3.

AT91SAM9G20 Power Management Controller Block Diagram

9.6

Periodic Interval Timer

• Includes a 20-bit Periodic Counter, with less than 1 µs accuracy

• Includes a 12-bit Interval Overlay Counter

• Real Time OS or Linux®/Windows CE® compliant tick generator

9.7

Watchdog Timer

• 16-bit key-protected only-once-Programmable Counter

• Windowed, prevents the processor being in a dead-lock on the watchdog access

9.8

Real-time Timer

• Real-time Timer 32-bit free-running back-up Counter

• Integrates a 16-bit programmable prescaler running on slow clock

• Alarm Register capable of generating a wake-up of the system through the Shutdown

Controller

9.9

General-purpose Back-up Registers

• Four 32-bit backup general-purpose registers

9.10

Advanced Interrupt Controller

• Controls the interrupt lines (nIRQ and nFIQ) of the ARM Processor

• Thirty-two individually maskable and vectored interrupt sources

MCK

periph_clk[..]

int

SLCK

MAINCK

PLLACK

Prescaler

/1,/2,/4,.../64

PCK

Processor

Clock

Controller

Idle Mode

Master Clock Controller

Peripherals

Clock Controller

ON/OFF

PLLBCK

Divider

/1,/2,/4,/6

USB Clock Controller

SLCK

MAINCK

PLLACK

Prescaler

/1,/2,/4,...,/64

Programmable Clock Controller

PLLBCK

Divider

/1,/2,/4

pck[..]

PLLBCK

UDPCK

ON/OFF

/1,/2

Divider

AT91SAM9G20 Datasheet(PDF) 27 Page - ATMEL Corporation

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