Electronic Components Datasheet Search
  English  ▼

X  

ST7787 Datasheet(PDF) 161 Page - Sitronix Technology Co., Ltd.

Part # ST7787
Description  262K Color Single-Chip TFT Controller/Driver
PDF  217 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  SITRONIX [Sitronix Technology Co., Ltd.]
Direct Link  http://www.sitronix.com.tw
Logo SITRONIX - Sitronix Technology Co., Ltd.

ST7787 Datasheet(HTML) 161 Page - Sitronix Technology Co., Ltd.

Back Button ST7787 Datasheet HTML 157Page - Sitronix Technology Co., Ltd. ST7787 Datasheet HTML 158Page - Sitronix Technology Co., Ltd. ST7787 Datasheet HTML 159Page - Sitronix Technology Co., Ltd. ST7787 Datasheet HTML 160Page - Sitronix Technology Co., Ltd. ST7787 Datasheet HTML 161Page - Sitronix Technology Co., Ltd. ST7787 Datasheet HTML 162Page - Sitronix Technology Co., Ltd. ST7787 Datasheet HTML 163Page - Sitronix Technology Co., Ltd. ST7787 Datasheet HTML 164Page - Sitronix Technology Co., Ltd. ST7787 Datasheet HTML 165Page - Sitronix Technology Co., Ltd. Next Button
Zoom Inzoom in Zoom Outzoom out
 161 / 217 page
background image
ST7787
Ver. 1.7
2008.04.18
161
10.2.1 RGBCTR (B0h): RGB signal control
B0H
RGBCTR (RGB signal control)
Inst / Para
D/CX
WRX
RDX
D17-8
D7
D6
D5
D4
D3
D2
D1
D0
(Code)
RGBCTR
0
↑
1
-
1
0
1
1
0
0
0
0
(B0h)
1
st Parameter
1
↑
1
-
0
0
0
ICM
DP
EP
HSP
VSP
NOTE: “-“ Don’t care
Description
-Set the operation status on the RGB interface. The setting becomes effective as soon as the
command is received.
-ICM: GRAM Write/Read frequency and data input select on the RGB interface
ICM
Write/ Read frequency and input data select
Write cycle
Read cycle
Data input
0
PCLK
PCLK
D[17:0]
1
SCL
Internal oscillator
SDA
Symbol
Name
Clock polarity set for RGB Interface
DP
PCLK polarity set
‘1’ = data fetched at the falling edge
‘0’ = data fetched at the rising edge
EP
Enable polarity set
‘1’ = Low enable for RGB interface
‘0’ = High enable for RGB interface
HSP
Hsync polarity set
‘1’ = High level sync clock
‘0’ = Low level sync clock
VSP
Vsync polarity set
‘1’ = High level sync clock
‘0’ = Low level sync clock
Restriction
-If this register not using the register need be reserved.
Register
Availability
Status
Availability
Normal Mode On, Idle Mode Off, Sleep Out
Yes
Normal Mode On, Idle Mode On, Sleep Out
Yes
Partial Mode On, Idle Mode Off, Sleep Out
Yes
Partial Mode On, Idle Mode On, Sleep Out
Yes
Sleep In
Yes
Default
Status
Default Value
ICM
DP/EP/HSP/VSP
Power On Sequence
S/W Reset
H/W Reset
Flow Chart
------------------
RGBCTR (B0h)
1
st Parameter:
ICM, DW, DP,
EP, HSP, VSP
Legend
Command
Parameter
Display
Action
Mode
Sequential
transfer



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com