AS3524 datasheet(69/124 Pages) AMSCO

69 / 124 page

AS3524 C21 / C22

austriamicrosystems

Data Sheet, Confidential

www.austriamicrosystems.com

Revision 1.11

- 124

Name

Base

Default

NAFStatus

AS3525_NAND_FLASH_BASE

Status Register

Offset 0x0014

The NAFStatus register contains information on the internal status.

Bit

Bit Name

Defau

Access

Bit Description

got_empty_and_rdy

0x0

NAFWords empty and Controller ready indication (edge

triggered)

0: when bit 2 of NAFClear register is set to ‘1’

1: when read/write strobe changes from ‘0’ to ‘1’ (end of

strobe) and NAFWords register has become empty.

Note: This bit is used to detect the end of a multiple read/write

burst transaction

got_strobe_ready

0x0

Read/write strobe ready indication (edge triggered)

0: when bit 1 of NAFClear register is set to ‘1’

1: when read/write strobe changes from ‘0’ to ‘1’ (end of

strobe)

Note: read/write strobes can last from 3 to 33 PCLK cycles

depending on NAFConfig settings.

got_flash_ready

0x0

NAFWords empty and Controller ready indication (edge

triggered)

0: when bit 2 of NAFClear register is set to ‘1’

1: when read/write strobe changes from ‘0’ to ‘1’ (end of

strobe) and NAFWords register has become empty.

Note: This bit is used to detect the end of a multiple read/write

burst transaction

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