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AS3524 Datasheet(PDF) 15 Page - ams AG |
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AS3524 Datasheet(HTML) 15 Page - ams AG |
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15 / 124 page ![]() AS3524 C21 / C22 austriamicrosystems Data Sheet, Confidential © 2003-2006, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved. www.austriamicrosystems.com Revision 1.11 15 - 124 Branch Instructions As well as letting data processing or load instructions change control flow (by writing the PC) a standard branch instruction is provided with 24-bit signed offset, providing for forward and backward branches of up to 32 MB. A branch with link (BL) instruction enables efficient subroutine calls. BL preserves the address of the instruction after the branch in R14 (Link register or LR). This lets a move instruction put the LR in to the PC and return to the instruction after the branch. The branch and exchange (BX) instruction switches between ARM and Thumb instruction sets with the return address optionally preserving the operating mode of the calling subroutine. Coprocessor Instructions There are three types of coprocessor instructions: • Coprocessor data processing instructions • Coprocessor register transfer instructions • Coprocessor data transfer instructions 5.1.5 JTAG Interface The ARM933T debug interface is based on IEEE Std. 1149.1- 1990, standard test access port. The ARM922T contains hardware extensions for advanced debugging features. These are intended to ease the development of application software. The debug extensions allow the core to be stopped by one of the following: • A given instruction fetch (breakpoint) • A data access (watchpoint) • Asynchronously by a debug request When this happens, the ARM922T is said to be in debug state. At this point, you can examine the internal state of the core and the external state of the system. When examination is complete, you can restore the core and system state and resume program execution. Normally, all control for debugging is done by running a debugger software (ARM AXD or ARM Realview Debugger) on a debug host PC. Connection to the chip is done by an ARM Multi-ICE interface, which connects either to the parallel port or the USB port of the debug host PC. The connection to the multi-ICE interface is done via a 20 way connector and ribbon cable. Following diagram shows the signals connections to the ICE connector. Figure 4 Interface connector to multi-ICE |
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