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AS3524 Datasheet(PDF) 47 Page - ams AG |
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AS3524 Datasheet(HTML) 47 Page - ams AG |
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47 / 124 page  AS3524 C21 / C22 austriamicrosystems Data Sheet, Confidential © 2003-2006, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved. www.austriamicrosystems.com Revision 1.11 47 - 124 5.3.6 I2cAudMas - I2C audio master interface This is the control interface between the digital and the audio-part. The corresponding signal lines are connected inside of the MCM on the BGA substrate. For test purposes of the audio chip only, the signals are available at dedicated balls. • The key features of this interface block are: • serial 2-wire I2C bus master • supports standard (100 kbps) and fast speed (400kbps) • 7-bit addressing • sub-addressing • programmable clock divider • programmable transfer count • soft reset bit • interrupt generation (on RX Full, TX Empty, RX Overrun, no acknowledge received) • status register • test register Figure 21 I2C Audio Master Interface Block Diagram Table 26 I2C Audio Master Registers Register Name Base Address Offset Note I2C2_DATA AS3525_I2C_AUDIO_BASE 0x00 transmit/receive FIFO data register I2C2_SLAD0 AS3525_I2C_AUDIO_BASE 0x04 slave ID register I2C2_CNTRL AS3525_I2C_AUDIO_BASE 0x0C control register I2C2_DACNT AS3525_I2C_AUDIO_BASE 0x10 master data count register I2C2_CPSR0 AS3525_I2C_AUDIO_BASE 0x1C clock prescale register 0 I2C2_CPSR1 AS3525_I2C_AUDIO_BASE 0x20 clock prescale register 1 I2C2_IMR AS3525_I2C_AUDIO_BASE 0x24 interrupt mask register I2C2_RIS AS3525_I2C_AUDIO_BASE 0x28 raw interrupt status register I2C2_MIS AS3525_I2C_AUDIO_BASE 0x2C masked interrupt status register I2C2_SR AS3525_I2C_AUDIO_BASE 0x30 I2C status register I2C2_INT_CLR AS3525_I2C_AUDIO_BASE 0x40 interrupt clear register I2C2_SADDR AS3525_I2C_AUDIO_BASE 0x44 sub-address register I2C2_TESTIN AS3525_I2C_AUDIO_BASE 0x50 test register (monitors state of SCL and SDA) I2C2_TESTOUT1 AS3525_I2C_AUDIO_BASE 0x54 test mode register for driving output interrupt I2C2_TESTOUT2 AS3525_I2C_AUDIO_BASE 0x58 test mode register for driving SCLout, SCLOEn, SDAOUT and SDAOEN signals |
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