 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
AS3524 Datasheet(PDF) 44 Page - ams AG |
|
|
|||||||||||||||||||||||||||||
AS3524 Datasheet(HTML) 44 Page - ams AG |
|
|
44 / 124 page  AS3524 C21 / C22 austriamicrosystems Data Sheet, Confidential © 2003-2006, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved. www.austriamicrosystems.com Revision 1.11 44 - 124 5.3.4 GPIO - General purpose input/output ports The ARM PrimeCell™ PL061 “General Purpose Input/Output” is included in the APB system. • compliant to AMBA Rev 2.0 • each port has eight individually programmable input/output pins, default to input at reset • four ports A, B, C, D are included • programmable interrupt generation capability, from a transition or level condition, on any number of PINs • hardware control capability of GPIO’s for different system configurations. • bit masking in both read and write operations through address lines Figure 18 GPIO Block Diagram Table 25: GPIO Registers Register Name Base Address Offset Note GPIO1_DATA AS3525_GPIO1_BASE 0x000 GPIO data register GPIO1_DIR AS3525_GPIO1_BASE 0x400 GPIO data direction register GPIO1_IS AS3525_GPIO1_BASE 0x404 GPIO interrupt sense register GPIO1_IBE AS3525_GPIO1_BASE 0x408 GPIO interrupt both edges register GPIO1_IEV AS3525_GPIO1_BASE 0x40C GPIO interrupt event register GPIO1_IE AS3525_GPIO1_BASE 0x410 GPIO interrupt mask register GPIO1_RIS AS3525_GPIO1_BASE 0x414 GPIO raw interrupt status GPIO1_MIS AS3525_GPIO1_BASE 0x418 GPIO masked interrupt status GPIO1_IC AS3525_GPIO1_BASE 0x41C GPIO interrupt clear GPIO1_AFSEL AS3525_GPIO1_BASE 0x420 GPIO mode control select GPIO2_DATA AS3525_GPIO2_BASE 0x000 GPIO data register GPIO2_DIR AS3525_GPIO2_BASE 0x400 GPIO data direction register GPIO2_IS AS3525_GPIO2_BASE 0x404 GPIO interrupt sense register GPIO2_IBE AS3525_GPIO2_BASE 0x408 GPIO interrupt both edges register GPIO2_IEV AS3525_GPIO2_BASE 0x40C GPIO interrupt event register GPIO2_IE AS3525_GPIO2_BASE 0x410 GPIO interrupt mask register GPIO2_RIS AS3525_GPIO2_BASE 0x414 GPIO raw interrupt status GPIO2_MIS AS3525_GPIO2_BASE 0x418 GPIO masked interrupt status GPIO2_IC AS3525_GPIO2_BASE 0x41C GPIO interrupt clear GPIO2_AFSEL AS3525_GPIO2_BASE 0x420 GPIO mode control select |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
