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AS3524 Datasheet(PDF) 84 Page - ams AG

Part # AS3524
Description  Advanced Audio Processor System
PDF  124 Pages
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Manufacturer  AMSCO [ams AG]
Direct Link  http://www.ams.com
Logo AMSCO - ams AG

AS3524 Datasheet(HTML) 84 Page - ams AG

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AS3524 C21 / C22
austriamicrosystems
Data Sheet, Confidential
© 2003-2006, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved.
www.austriamicrosystems.com
Revision 1.11
84
- 124
5.3.13.1 UART Baud Generator and Clock Divider Settings
The internal baud generator module generates the required baud clock using the divisor register value. To achieve correct synchronizationincoming
bits are over sampled by a factor of 16x. Software should program the divisor value by which the system clock has to be divided to achieve the
required baud clock frequency.
The equation to calculate baud divisor is
Baud Divisor = (input frequency)
÷ (baud rate x 16)
Important: the internal clock divider must be set to a value of 2 or higher. Setting the value to 1 (no division) is not allowed!
For example, for 16 MHz PCLK clock following table gives the list of settings for different BAUD rates.
Baud Rate
Required Baud
clock frequency
Decimal
divisor value
50
800
20000
75
1200
13333
110
1760
9091
134.5
2152
7435
150
2400
6667
300
4800
3333
600
9600
1667
1200
19200
833
1800
28800
556
2000
32000
500
4800
76800
208
7200
115200
139
9600
153600
104
19200
307200
52
38400
614400
26
56000
896000
18
128000
204800
8
250000
4000000
4
300000
4800000
3
500000
8000000
2



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