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82G33 Datasheet(PDF) 65 Page - Intel Corporation

Part # 82G33
Description  Graphics and Memory Controller Hub
PDF  437 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

82G33 Datasheet(HTML) 65 Page - Intel Corporation

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System Address Map
Datasheet
65
3.4.1
Memory Re-claim Background
The following are examples of Memory Mapped IO devices are typically located below
4 GB:
• High BIOS
• HSEG
• TSEG
• Graphics stolen
• XAPIC
• Local APIC
• FSB Interrupts
• Mbase/Mlimit
• Memory-mapped I/O space that supports only 32 B addressing
The (G)MCH provides the capability to re-claim the physical memory overlapped by
the Memory Mapped IO logical address space. The (G)MCH re-maps physical memory
from the Top of Low Memory (TOLUD) boundary up to the 4 GB boundary to an
equivalent sized logical address range located just below the Intel ME's stolen
memory.
3.4.2
Memory Reclaiming
An incoming address (referred to as a logical address) is checked to see if it falls in
the memory re-map window. The bottom of the re-map window is defined by the
value in the RECLAIMBASE register. The top of the re-map window is defined by the
value in the RECLAIMLIMIT register. An address that falls within this window is
reclaimed to the physical memory starting at the address defined by the TOLUD
register. The TOLUD register must be 64 MB aligned when RECLAIM is enabled, but
can be 1 MB aligned when reclaim is disabled.
3.5
PCI Express* Configuration Address Space
There is a device 0 register, PCIEXBAR, that defines the base address for the
configuration space associated with all devices and functions that are potentially a
part of the PCI Express root complex hierarchy. The size of this range is
programmable for the (G)MCH. BIOS must assign this address range such that it will
not conflict with any other address ranges. See Chapter 6 for more details.



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