82G33 datasheet(52/437 Pages) INTEL

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System Address Map

Datasheet

The Address Map includes a number of programmable ranges:

• Device 0

⎯ PXPEPBAR – Express port registers. Necessary for setting up VC1 as an

isochronous channel using time based weighted round robin arbitration. (4 KB

window)

⎯ MCHBAR – Memory mapped range for internal (G)MCH registers. For example,

memory buffer register controls. (16 KB window)

⎯ PCIEXBAR – Flat memory-mapped address spaced to access device

configuration registers. This mechanism can be used to access PCI

configuration space (0-FFh) and Extended configuration space (100h–FFFh) for

PCI Express devices. This enhanced configuration access mechanism is defined

in the PCI Express specification. (64 MB, 128 MB, or 256 MB window).

⎯ DMIBAR –This window is used to access registers associated with the Direct

Media Interface (DMI) register memory range. (4 KB window)

⎯ GGCGMS (82Q35/82Q33/82G33 GMCH only) – GMCH graphics control

memory that is pre-allocated to support the internal graphics device in VGA

(non-linear) and Native (linear) modes.

(0–256 MB options).

⎯ GGCGGMS (82Q35/82Q33/82G33 GMCH only) – GMCH graphics control

of main memory that is pre-allocated to support the Internal Graphics

Translation Table. (0–2 MB options).

• Device 1

⎯ MBASE1/MLIMIT1 – PCI Express port non-prefetchable memory access

window.

⎯ PMBASE1/PMLIMIT1 – PCI Express port prefetchable memory access window.

⎯ PMUBASE/PMULIMIT – PCI Express port upper prefetchable memory access

window

⎯ IOBASE1/IOLIMIT1 – PCI Express port IO access window.

• Device 2, Function 0 (82Q35/82Q33/82G33 GMCH only)

⎯ MMADR – IGD registers and internal graphics instruction port. (512 KB

window)

⎯ IOBAR – IO access window for internal graphics. Though this window

address/data register pair, using I/O semantics, the IGD and internal graphics

instruction port registers can be accessed. Note, this allows accessing the

same registers as MMADR. In addition, the IOBAR can be used to issue writes

to the GTTADR table.

⎯ GMADR – Internal graphics translation window. (128 MB, 256 MB or 512 MB

window).

⎯ GTTADR – Internal graphics translation table location. (1 MB window). Note

that the Base of GTT stolen Memory register (Device 0 A8) indicates the

physical address base which is 1 MB aligned.

• Device 2, Function 1 (82Q35/82Q33/82G33 GMCH only)

⎯ MMADR – Function 1 IGD registers and internal graphics instruction port.

(512 KB window)

• Device 3, Function 0

⎯ EPHECIBAR – Function 0 HECI memory-mapped registers.

(16 B window)

82G33 Datasheet(PDF) 52 Page - Intel Corporation

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