| Electronic Components Datasheet Search |
|
XIO2221 Datasheet(PDF) 37 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
XIO2221 Datasheet(HTML) 37 Page - Texas Instruments |
|
37 / 196 page ![]() S b6 b4 b5 b3 b2 b1 b0 0 b7 b6 b5 b4 b3 b2 b1 b0 A A Slave Address Word Address R/W S/P =Start/StopCondition A =Slave Acknowledgement b7 b6 b4 b5 b3 b2 b1 b0 A P DataByte S b6 b4 b5 b3 b2 b1 b0 0 b7 b6 b5 b4 b3 b2 b1 b0 A A Slave Address Word Address R/W S b6 b4 b5 b3 b2 b1 b0 1 A Slave Address S/P =Start/StopCondition M=Master Acknowledgement b7 b6 b4 b5 b3 b2 b1 b0 M P DataByte Start Restart R/W A =Slave Acknowledgement Stop S 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A A Slave Address Word Address R/W DataByte1 DataByte2 DataByte3 M P M M M=Master Acknowledgement S/P =Start/StopCondition A =Slave Acknowledgement DataByte0 M S 1 1 0 0 0 0 0 1 A Restart R/W Slave Address Start XIO2221 www.ti.com SCPS216A – JULY 2009 – REVISED FEBRAURY 2010 Figure 3-9. Serial-Bus Protocol Byte Write Figure 3-10 shows a single-byte read. The bridge issues a start condition and sends the 7-bit slave device address, and the R/W command bit is equal to 0b (write). The slave device acknowledges if it recognizes the slave address. Next, the EEPROM word address is sent by the bridge, and another slave acknowledgment is expected. Then, the bridge issues a restart condition followed by the 7-bit slave address, and the R/W command bit is equal to 1b (read). Once again, the slave device responds with an acknowledge. Next, the slave device sends the 8-bit data byte, MSB first. Since this is a 1-byte read, the bridge responds with no acknowledge (logic high) indicating the last data byte. Finally, the bridge issues a stop condition. Figure 3-10. Serial-Bus Protocol Byte Read Figure 3-11 shows the serial interface protocol during a multibyte serial EEPROM download. The serial-bus protocol starts exactly the same as a 1-byte read. The only difference is that multiple data bytes are transferred. The number of transferred data bytes is controlled by the bridge master. After each data byte, the bridge master issues acknowledge (logic low) if more data bytes are requested. The transfer ends after a bridge master no acknowledge (logic high) followed by a stop condition. Figure 3-11. Serial-Bus Protocol Multibyte Read Copyright © 2009–2010, Texas Instruments Incorporated Feature/Protocol Descriptions 37 Submit Documentation Feedback Product Folder Link(s): XIO2221 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |