XIO2221 datasheet(69/196 Pages) TI1

69 / 196 page

XIO2221

www.ti.com

SCPS216A – JULY 2009 – REVISED FEBRAURY 2010

4.45 Subsystem Vendor ID Register

This register, used for system and option card identification purposes, may be required for certain

operating systems. This read-only register is initialized through the EEPROM and can be written through

the subsystem alias register. This register shall only be reset by a fundamental reset (FRST).

PCI register offset:

84h

Read only

Default value:

0000h

BIT NUMBER

RESET STATE

4.46 Subsystem ID Register

This register, used for system and option card identification purposes, may be required for certain

operating systems. This read-only register is initialized through the EEPROM and can be written through

the subsystem alias register. This register shall only be reset by FRST.

PCI register offset:

86h

Read only

Default value:

0000h

BIT NUMBER

RESET STATE

4.47 PCI Express Capability ID Register

This read-only register identifies the linked list item as the register for PCIe capabilities. The register

returns 10h when read.

PCI register offset:

90h

Read only

Default value:

10h

BIT NUMBER

RESET STATE

4.48 Next Item Pointer Register

The contents of this read-only register indicate the next item in the linked list of capabilities for the bridge.

This register reads 00h indicating no additional capabilities are supported.

PCI register offset:

91h

Read only

Default value:

00h

BIT NUMBER

RESET STATE

Classic PCI Configuration Space

Submit Documentation Feedback

Product Folder Link(s): XIO2221

XIO2221 Datasheet(PDF) 69 Page - Texas Instruments

XIO2221 Datasheet(HTML) 69 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL