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PSOC Datasheet(PDF) 133 Page - Cypress Semiconductor

Part # PSOC
Description  8-Bit Programmable System-on-Chip (PSoC?? Microcontrollers
PDF  148 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

PSOC Datasheet(HTML) 133 Page - Cypress Semiconductor

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DC and AC Characteristics
September 5, 2002
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
133
13.2.6
DC Analog Reference Specifications
The following table lists guaranteed maximum and mini-
mum specifications for the voltage and temperature
ranges, 5V +/- 5% and -40°C <= TA <= 85°C. The guar-
anteed specifications are measured through the Analog
Continuous Time PSoC blocks. The bias levels for
AGND refer to the bias of the Analog Continuous Time
PSoC block. The bias levels for RefHi and RefLo refer to
the Analog Reference Control Register. The limits stated
for AGND include the offset error of the AGND buffer
local to the Analog Continuous Time PSoC block. Typical
parameters apply to 5V at 25C and are for design guid-
ance only. (3.3V replaces 5V for the 3.3V DC Analog
Reference Specifications.)
Table 111:
5V DC Analog Reference Specifications
Symbol
5V DC Analog Reference Specifications
Minimum
Typical
Maximum
Unit
AGND = Vcc/21
CT Block Bias = High
Vcc/2 - 0.010
Vcc/2 - 0.004
Vcc/2 + 0.003
V
AGND = 2*BandGap1
CT Block Bias = High
2*BG - 0.043
2*BG - 0.010
2*BG + 0.024
V
AGND = P2[4] (P2[4] = Vcc/2)1
CT Block Bias = High
P24 - 0.013
P24 0.001
P24 + 0.014
V
AGND Column to Column Variation (AGND=Vcc/
2)1
CT Block Bias = High
-0.034
0.000
0.034
mV
REFHI = Vcc/2 + BandGap
Ref Control Bias = High
Vcc/2+BG - 0.140 Vcc/2+BG - 0.018
Vcc/2+BG +
0.103
V
REFHI = 3*BandGap
Ref Control Bias = High
3*BG - 0.112
3*BG - 0.018
3*BG + 0.076
V
REFHI = 2*BandGap + P2[6] (P2[6] = 1.3V)
Ref Control Bias = High
2*BG+P2[6] -
0.113
2*BG+P2[6] -
0.018
2*BG+P2[6]+
0.077
V
REFHI = P2[4] + BandGap (P2[4] = Vcc/2)
Ref Control Bias = High
P2[4]+BG -
0.130
P2[4]+BG -
0.016
P2[4]+BG +
0.098
V
REFHI = P2[4] + P2[6] (P2[4] = Vcc/2, P2[6] =
1.3V)
Ref Control Bias = High
P2[4]+P2[6] -
0.133
P2[4]+P2[6] -
0.016
P2[4]+P2[6]+
0.100
V
REFLO = Vcc/2 – BandGap
Ref Control Bias = High
Vcc/2-BG - 0.051 Vcc/2-BG + 0.024 Vcc/2-BG + 0.098 V
REFLO = BandGap
Ref Control Bias = High
BG - 0.082
BG + 0.023
BG + 0.129
V
REFLO = 2*BandGap - P2[6] (P2[6] = 1.3V)
Ref Control Bias = High
2*BG-P2[6] -
0.084
2*BG-P2[6] +
0.025
2*BG-P2[6] +
0.134
V
REFLO = P2[4] – BandGap (P2[4] = Vcc/2)
Ref Control Bias = High
P2[4]-BG -
0.056
P2[4]-BG +
0.026
P2[4]-BG +
0.107
V
REFLO = P2[4]-P2[6] (P2[4] = Vcc/2, P2[6] =
1.3V)
Ref Control Bias = High
P2[4]-P2[6] -
0.057
P24-P26 +
0.026
P2[4]-P2[6] +
0.110
V



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