WM5102 datasheet(118/334 Pages) WOLFSON

118 / 334 page

WM5102

Production Data

PD, June 2014, Rev 4.2

118

In DSP mode, the left channel MSB is available on either the 1st (mode B) or 2nd (mode A) rising edge

of BCLK following a rising edge of LRCLK. Right channel data immediately follows left channel data.

Depending on word length, BCLK frequency and sample rate, there may be unused BCLK cycles

between the LSB of the right channel data and the next sample.

In master mode, the LRCLK output will resemble the frame pulse shown in Figure 45 and Figure 46. In

slave mode, it is possible to use any length of frame pulse less than 1/fs, providing the falling edge of

the frame pulse occurs at least one BCLK period before the rising edge of the next frame pulse.

Figure 45 DSP Mode A Data Format

Figure 46 DSP Mode B Data Format

PCM operation is supported in DSP interface mode. WM5102 data that is output on the Left Channel

will be read as mono PCM data by the receiving equipment. Mono PCM data received by the WM5102

will be treated as Left Channel data. This data may be routed to the Left/Right playback paths using

the control fields described in the “Digital Core” section.

In I2S mode, the MSB is available on the second rising edge of BCLK following a LRCLK transition.

The other bits up to the LSB are then transmitted in order. Depending on word length, BCLK

frequency and sample rate, there may be unused BCLK cycles between the LSB of one sample and

the MSB of the next.

Figure 47 I2S Data Format (assuming n-bit word length)

WM5102 Datasheet(PDF) 118 Page - Wolfson Microelectronics plc