WM5102 datasheet(115/334 Pages) WOLFSON

115 / 334 page

Production Data

WM5102

PD, June 2014, Rev 4.2

115

DSP DEBUG SUPPORT

General purpose ‘scratch’ registers are provided for the DSP. These have no assigned function, and

can be used to assist in algorithm development.

The JTAG interface provides test and debug access to the WM5102, as described in the “JTAG

Interface” section. The JTAG interface clock is enabled using the DSP1_DBG_CLK_ENA register bit.

When using the JTAG interface to access the DSP core, the DSP1_DBG_CLK_ENA,

DSP1_SYS_ENA, and DSP1_CORE_ENA bits must all be set.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R4352

(1100h)

DSP1

Control 1

DSP1_DBG_CLK

_ENA

DSP1 Debug Clock Enable

0 = Disabled

1 = Enabled

R4416

(1140h)

DSP1

Scratch 0

15:0

DSP1_SCRATCH

_0 [15:0]

0000h

DSP1 Scratch Register 0

R4417

(1141h)

DSP1

Scratch 1

15:0

DSP1_SCRATCH

_1 [15:0]

0000h

DSP1 Scratch Register 1

R4418

(1142h)

DSP1

Scratch 2

15:0

DSP1_SCRATCH

_2 [15:0]

0000h

DSP1 Scratch Register 2

R4419

(1143h)

DSP1

Scratch 3

15:0

DSP1_SCRATCH

_3 [15:0]

0000h

DSP1 Scratch Register 3

Table 28 DSP Debug Support

WM5102 Datasheet(PDF) 115 Page - Wolfson Microelectronics plc

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