WM5102 datasheet(193/334 Pages) WOLFSON

193 / 334 page

Production Data

WM5102

PD, June 2014, Rev 4.2

193

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R3408

(0D50h)

AOD wkup

and trig

MICD_CLAMP_FALL_T

RIG_STS

MICDET Clamp Trigger Status

(Falling edge triggered)

Note: Cleared when a ‘1’ is written

MICD_CLAMP_RISE_T

RIG_STS

MICDET Clamp Trigger Status

(Rising edge triggered)

Note: Cleared when a ‘1’ is written

GP5_FALL_TRIG_STS

GP5 Trigger Status

(Falling edge triggered)

Note: Cleared when a ‘1’ is written

GP5_RISE_TRIG_STS

GP5 Trigger Status

(Rising edge triggered)

Note: Cleared when a ‘1’ is written

JD1_FALL_TRIG_STS

JD1 Trigger Status

(Falling edge triggered)

Note: Cleared when a ‘1’ is written

JD1_RISE_TRIG_STS

JD1 Trigger Status

(Rising edge triggered)

Note: Cleared when a ‘1’ is written

Table 82 JD1, GP5 and MICDET Clamp Trigger Status Registers

Note that the de-bounce function on all inputs (including JD1, GP5 and MICDET Clamp status) use

the 32kHz clock (see “Clocking and Sample Rates”). The 32kHz clock must be enabled whenever

input de-bounce functions are required.

Note that the MCLK2 input pin is on the ‘Always-On’ domain, and is supported in Sleep mode.

(MCLK1 input is not supported in Sleep mode.)

If input de-bounce is enabled in Sleep mode, the 32kHz clock must use MCLK2 (direct) input as its

source (CLK_32K_SRC = 01).

WM5102 Datasheet(PDF) 193 Page - Wolfson Microelectronics plc

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