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WM5102 Datasheet(PDF) 196 Page - Wolfson Microelectronics plc |
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WM5102 Datasheet(HTML) 196 Page - Wolfson Microelectronics plc |
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196 / 334 page ![]() WM5102 Production Data w PD, June 2014, Rev 4.2 196 GENERAL PURPOSE INPUT / OUTPUT The WM5102 provides a number of GPIO functions to enable interfacing and detection of external hardware and to provide logic outputs to other devices. The GPIO input functions can be used to generate an Interrupt (IRQ) event. The GPIO and Interrupt circuits support the following functions: Digital audio interface function (AIFnTXLRCLK) Logic input / Button detect (GPIO input) Logic ‘1’ and logic ‘0’ output (GPIO output) Interrupt (IRQ) status output DSP Status Flag (DSP IRQn) and RAM status output Clock output Frequency Locked Loop (FLL) status output Frequency Locked Loop (FLL) Clock output Pulse Width Modulation (PWM) Signal output Headphone Detection status output Microphone / Accessory Detection status output Asynchronous Sample Rate Converter (ASRC) Lock status and Configuration Error output Control Write Sequencer status output Over-Temperature status output Dynamic Range Control (DRC) status output Control Interface Error status output Clocking Error status output Digital audio interface Configuration Error status output Note that the GPIO pins are referenced to different power domains (DBVDD1, DBVDD2 or DBVDD3), as noted in the “Pin Description” section. In addition to the functions described in this section, the GPIO5 pin can be configured as an input to the Control Write Sequencer (see “Control Write Sequencer”). See also Table 84 for details of the associated register control fields. The GPIO5 pin is one of the ‘Always On’ digital input / output pins and can be used as a ‘Wake-Up’ input in the low-power ‘Sleep’ mode. The GPIO5 pin can also be used as an input to the MICDET Clamp function, supporting additional functionality relating to jack insertion or jack removal events See “Low Power Sleep Configuration” for further details. |
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