WM5102 datasheet(249/334 Pages) WOLFSON

249 / 334 page

Production Data

WM5102

PD, June 2014, Rev 4.2

249

GPIO OUTPUTS FROM FLL

For each FLL, the WM5102 supports an ‘FLL Clock OK’ signal which, when asserted, indicates that

the FLL has started up and is providing an output clock. Each FLL also supports an ‘FLL Lock’ signal

which indicates whether FLL Lock has been achieved.

The FLL Clock OK status and FLL Lock status are inputs to the Interrupt control circuit and can be

used to trigger an Interrupt event - see “Interrupts”.

The FLL Clock OK and FLL Lock signals can be output directly on a GPIO pin as an external

indication of the FLL status. See “General Purpose Input / Output” to configure a GPIO pin for these

functions.

Clock output signals derived from the FLL can be output on a GPIO pin. See “General Purpose Input /

Output” to configure a GPIO pin for this function.

The FLL clocking configuration is illustrated in Figure 70.

EXAMPLE FLL CALCULATION

The following example illustrates how to derive the FLL1 registers to generate 49.152 MHz output

(FOUT) from a 12.000 MHz reference clock (FREF):



Set FLL1_REFCLK_DIV in order to generate FREF <=13.5MHz:

FLL1_REFCLK_DIV = 00 (divide by 1)



Set FLL1_OUTDIV for the required output frequency as shown in Table 101:-

FOUT = 49.152 MHz, therefore FLL1_OUTDIV = 2h (divide by 2)



Set FLL1_FRATIO for the given reference frequency as shown in Table 102:

FREF = 12MHz, therefore FLL1_FRATIO = 0h (divide by 1)



Calculate FVCO as given by FVCO = FOUT x FLL1_OUTDIV:-

FVCO = 49.152 x 2 = 98.304MHz



Calculate N.K as given by N.K = FVCO / (FLL1_FRATIO x FREF):

N.K = 98.304 / (1 x 12) = 8.192



Determine FLL1_N from the integer portion of N.K:-

FLL1_N = 8 (008h)



Determine GCD(FLL), as given by GCD(FLL) = GCD(FLL1_FRATIO x FREF, FVCO):

GCD(FLL) = GCD(1 x 12000000, 98304000) = 96000



Determine FLL1_THETA, as given by

FLL1_THETA = (FVCO - (FLL1_N x FLL1_FRATIO x FREF)) / GCD(FLL):

FLL1_THETA = (98304000 - (8 x 1 x 12000000)) / 96000

FLL1_THETA = 24 (0018h)



Determine FLL_LAMBDA, as given by

FLL1_LAMBDA = (FLL1_FRATIO x FREF) / GCD(FLL):

FLL1_LAMBDA = (1 x 12000000) / 96000

FLL1_LAMBDA = 125 (007Dh)

WM5102 Datasheet(PDF) 249 Page - Wolfson Microelectronics plc

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