WM5102 datasheet(271/334 Pages) WOLFSON

271 / 334 page

Production Data

WM5102

PD, June 2014, Rev 4.2

271

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

MICB3_DISCH

Microphone Bias 3 Discharge

0 = MICBIAS3 floating when disabled

1 = MICBIAS3 discharged when disabled

MICB3_BYPASS

Microphone Bias 3 Mode

0 = Regulator mode

1 = Bypass mode

MICB3_ENA

Microphone Bias 3 Enable

0 = Disabled

1 = Enabled

R3104

(0C20h)

Misc Pad

Ctrl 1

LDO1ENA_PD

LDOENA Pull-Down Control

0 = Disabled

1 = Enabled

R715

(02CBh)

Isolation

control

ISOLATE_DCVD

Always-On power domain isolate control

Set this bit to 1 to isolate the ‘Always-On’

domain from the DCVDD pin.

If DCVDD is powered externally (not from

LDO1), this bit must be set before

selecting Sleep mode (ie. before removing

the external DCVDD supply).

If DCVDD is powered from LDO1, then

there is no requirement to set this bit.

This bit is automatically reset to 0

following a Wake-up transition (from Sleep

mode).

Table 120 Charge Pump and LDO Control Registers

LDO2_VSEL [5:0]

LDO2 OUTPUT

LDO2_VSEL [5:0]

LDO2 OUTPUT

00h

1.70V

10h

2.50V

01h

1.75V

11h

2.55V

02h

1.80V

12h

2.60V

03h

1.85V

13h

2.65V

04h

1.90V

14h

2.70V

05h

1.95V

15h

2.75V

06h

2.00V

16h

2.80V

07h

2.05V

17h

2.85V

08h

2.10V

18h

2.90V

09h

2.15V

19h

2.95V

0Ah

2.20V

1Ah

3.00V

0Bh

2.25V

1Bh

3.05V

0Ch

2.30V

1Ch

3.10V

0Dh

2.35V

1Dh

3.15V

0Eh

2.40V

1Eh

3.20V

0Fh

2.45V

1Fh

3.30V

Table 121 LDO2 Voltage Control

WM5102 Datasheet(PDF) 271 Page - Wolfson Microelectronics plc

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