PM8313 datasheet(112/192 Pages) PMC

112 / 192 page

PM8313 D3MX

DATA SHEET

PMC-920702

ISSUE 5

M13 MULTIPLEXER

102

Bit

Type

Function

Default

Bit 7

Unused

Bit 6

Unused

Bit 5

Unused

Bit 4

Unused

Bit 3

Unused

Bit 2

R/W

IDLE

Bit 1

R/W

AVC

Bit 0

R/W

BOCE

This register selects the validation criteria to be used in determining a valid

bit-oriented code (BOC) on the far-end alarm and control (FEAC) channel and

enables generation of an interrupt at code validation.

BOCE:

The BOCE bit position enables or disables the generation of an interrupt

when a valid BOC is detected. A logic 1 in this bit position enables

generation of an interrupt; a logic 0 in this bit position disables interrupt

generation. When the D3MX is reset, BOCE is reset to logic 0; therefore,

interrupt generation is disabled.

AVC:

The AVC bit position selects the validation criterion used in determining a

valid BOC. A logic 0 selects the 8 out of 10 matching BOC criterion; a logic 1

in the AVC bit position selects the "alternative" validation criterion of 4 out of 5

matching BOCs.

IDLE:

The IDLE bit position enables or disables the generation of an interrupt when

there is a transition from a validated BOC to idle code. A logic 1 in this bit

position enables generation of an interrupt; a logic 0 in this bit position

disables interrupt generation.

PM8313 Datasheet(PDF) 112 Page - PMC-Sierra, Inc

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