PM8313 datasheet(129/192 Pages) PMC

129 / 192 page

PM8313 D3MX

DATA SHEET

PMC-920702

ISSUE 5

M13 MULTIPLEXER

119

Registers 43H, 53H, 63H, 73H, 83H, 93H and A3H: DS2 FRMR Status

Bit

Type

Function

Default

Bit7

Unused

Bit6

Unused

Bit5

REDV

Bit4

FERFV

Bit3

RESV

Bit2

AISV

Bit1

OOFV

Bit0

Unused

OOFV, AISV, FERFV, REDV:

The OOFV, AISV, FERFV and REDV bits in this register reflect the status of

the corresponding DS2 FRMR value. The OOFV bit is a logic 1 if the DS2

framer is presently out-of-frame. The AISV bit is a logic 1 if AIS has been

declared.

In DS2 mode, the FERFV bit reflects the debounced state of the X bit (first bit

of the M4-Subframe). If the X-bit has been a zero for two consecutive M-

frames, the FERFV bit becomes a logic 1. If the X-bit has been a one for two

consecutive M-frames, the FERFV bit becomes a logic 0.

In G.747 mode, FERFV bit reflects the debounced state of the Remote Alarm

Indication (RAI, bit 1 of Set II) bit. If the RAI bit has been a one for two

consecutive frames, the FERFV bit becomes a logic 1. If the RAI bit has

been a zero for two consecutive frames, the FERFV bit becomes a logic 0.

A six frame latency of the FERFV status ensures a virtually 100% probability

of freezing correctly in DS2 mode upon an out-of-frame condition and a better

than 99.9% probability of freezing correctly in G.747 mode.

REDV:

The REDV bit is a logic 1 if an out-of-frame condition has persisted for 9.9 ms

(6.9ms in G.747 mode). This is less than 1.5 times the maximum average

reframe time allowed. The REDV status will remain asserted for 9.9 ms

(6.9ms in G.747 mode) after frame alignment has been declare and then

become logic 0.

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