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PM8313 Datasheet(PDF) 125 Page - PMC-Sierra, Inc |
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PM8313 Datasheet(HTML) 125 Page - PMC-Sierra, Inc |
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125 / 192 page ![]() PM8313 D3MX DATA SHEET PMC-920702 ISSUE 5 M13 MULTIPLEXER 115 Registers 40H, 50H, 60H, 70H, 80H, 90H and A0H: DS2 FRMR Configuration Bit Type Function Default Bit7 R/W G747 0 Bit6 Unused X Bit5 R/W WORD 0 Bit4 R/W M2O5 0 Bit3 R/W MBDIS 0 Bit2 R/W REFR 0 Bit1 Unused X Bit0 Unused X REFR: The REFR bit is used to trigger reframing. If a logic 1 is written to REFR when it was previously logic 0, the FRMR is forced out-of-frame, and a new search for frame alignment is initiated. Note that only a low-to-high transition of the REFR bit triggers reframing; multiple write operations are required to ensure such a transition. MBDIS: The MBDIS bit disables the declaration of out-of-frame upon excessive M-bit errors. If MBDIS is a logic 0, out-of-frame is declared when one or more M- bit errors are detected in 3 out of 4 consecutive M-frames. If MBDIS is a logic 1, the state of the M-bits is ignored once in frame. Regardless of the state of the MBDIS bit, the F-bits are always monitored for invalid framing. M2O5: The M2O5 bit selects the error ratio for declaring out-of-frame (OOF) when in DS2 mode only. When a 1 is written to M2O5, the framer declares OOF when 2 F-bit errors out of 5 consecutive F-bits are observed. When a 0 is written, the framer declares OOF when 2 F-bit errors out of 4 consecutive F-bits are observed. (These two ratios are recommended in TR-TSY-000009 Section 4.1.2) When the FRMR is configured for G.747 operation (the G747 bit is set to logic 1), the OOF status is declared when 4 consecutive framing word errors occur (as per CCITT Rec. G747 Section 4), regardless of the M2O5 bit setting. |
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