PM8313 datasheet(127/192 Pages) PMC

127 / 192 page

PM8313 D3MX

DATA SHEET

PMC-920702

ISSUE 5

M13 MULTIPLEXER

117

Registers 41H, 51H, 61H, 71H, 81H, 91H and A1H: DS2 FRMR Interrupt

Enable

Bit

Type

Function

Default

Bit7

R/W

COFAE

Bit6

Unused

Bit5

R/W

REDE

Bit4

R/W

FERFE

Bit3

R/W

RESE

Bit2

R/W

AISE

Bit1

R/W

OOFE

Bit0

Unused

OOFE, AISE, FERFE, REDE:

The OOFE, AISE, FERFE and REDE bits are interrupt enables. A change of

state on a corresponding DS2 FRMR status causes the interrupt output,

INTB, to be asserted low when the corresponding interrupt enable bit is

written with a logic 1.

COFAE:

The COFAE bit is an interrupt enable. A change of frame alignment (COFA)

event causes the interrupt output to be set high when the COFAE bit is

written with a logic 1.

RESE:

The RESE bit is an interrupt enable. A change in the debounced value of the

reserved bit in Set II when in G.747 mode causes the interrupt output to be

set high when the RESE bit is written with a logic 1. The debounced value of

the reserved bit only changes when the reserved bit is the same for two

consecutive frames. The RESE bit has no effect in DS2 mode.

The interrupt output, INTB, is deasserted when the Interrupt Status Register is

read if its assertion was a result an OOF, AIS, FERF, RED, RES, or COFA event.

PM8313 Datasheet(PDF) 127 Page - PMC-Sierra, Inc

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