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PM8313 Datasheet(PDF) 159 Page - PMC-Sierra, Inc |
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PM8313 Datasheet(HTML) 159 Page - PMC-Sierra, Inc |
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159 / 192 page ![]() PM8313 D3MX DATA SHEET PMC-920702 ISSUE 5 M13 MULTIPLEXER 149 Figure 10 - XFDL Underrun Sequence Flag D1 D2 Flag D2 TDLINT D3 D1 D2 D3 TDLUDR D3 Abort D1 UDR D4 D1 D2 D[7:0] INTE INTE INTE Serial Data inserted into Datalink This diagram shows the relationship between XFDL inputs and outputs in the case of an underrun error. An underrun error occurs if the XFDL finishes transmitting the current message byte before the processor writes the next byte into the Transmit Data Register; that is, the processor fails to write data to the XFDL in time. In this example, data is not written to the XFDL within five rising clock edges after TDLINT is asserted at the beginning of the transmission of byte D3. The TDLUDR interrupt becomes active at this point, and an abort, followed by a flag, is sent out on the data link. Meanwhile, the processor must clear the TDLUDR interrupt by setting the UDR bit in the Status Register to logic 0. The TDLINT interrupt should also be disabled at this time by setting the INTE bit in the Configuration/Control Register to logic 0. The data frame can then be restarted as usual, by setting the INTE bit logic to 1. Transmission of the frame then proceeds normally. |
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