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PM8313 Datasheet(PDF) 163 Page - PMC-Sierra, Inc |
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PM8313 Datasheet(HTML) 163 Page - PMC-Sierra, Inc |
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163 / 192 page ![]() PM8313 D3MX DATA SHEET PMC-920702 ISSUE 5 M13 MULTIPLEXER 153 Figure 14 - TDLINT Timing - Normal Data Transmission WRB & (A[8:0]='h22) TDLINT TDLEOMI Write of a byte of packet. min. 216 µs max. 311 µs TDLUDR Write of next byte has not occurred <110 µs Write of a byte of packet. min. 216 µs max. 311 µs min. 216 µs max. 311 µs In this example successive bytes of a packet are written to the XFDL. Each byte must be written within 110µs from the TDLINT rising edge. Each subsequent assertion of TDLINT occurs once all 8 bits of the current data byte have been transmitted. The range in assertion times is due to the temporal spacing of the datalink bits (3 C-bits of M-subframe 5). If another byte is not written to the data register within 110µs of each TDLINT assertion, an underrun condition occurs. The underrun will be indicated on the TDLUDR output and in the UDR status bit within the XFDL Interrupt Status register. |
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