PM8313 datasheet(165/192 Pages) PMC

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PM8313 D3MX

DATA SHEET

PMC-920702

ISSUE 5

M13 MULTIPLEXER

155

XFDL must be serviced within 210µs of TDLINT assertion, otherwise an

underrun condition occurs (see Figure 10).

Note that TDLEOMI must be glitch free. If TDLEOMI is not used, it must be held

low, and indication of end of message can be performed through the EOM bit of

the XFDL Configuration Register. This bit may be set by a write to the

configuration register any time after the write of the last data byte, but before 210

µs have elapsed since the TDLINT output (or INT bit in the XFDL Status

Figure 16

- TDLEOMI Timing - With Removal of TDLEOMI After

Completion of FCS Transmission

WRB &

(A[8:0]='h22)

TDLINT

TDLEOMI

Write last

byte of packet.

Write of 1st byte

of next packet.

< 210 µs

Assertion suppressed

by TDLEOMI

min 216 µs

max 311 µs

850 µs

Last byte +

FCS transmission

> 0 ns

FLAG transmission

In this example, the TDLEOMI is asserted anytime up to 210µs from the TDLINT

rising edge and is deasserted long after the FCS has been completely

transmitted. The TDLINT signal is suppressed by the assertion of TDLEOMI and

remains suppressed until TDLEOMI is deasserted. TDLINT is asserted

immediately, indicating that the XFDL is ready to receive the first byte of a new

packet. Again, while the XFDL is awaiting the first byte of a new packet, an

underrun condition cannot occur. Once the first byte is written, however, the

XFDL must be serviced within 210µs of each TDLINT assertion, otherwise an

underrun condition occurs (see Figure 10).

PM8313 Datasheet(PDF) 165 Page - PMC-Sierra, Inc

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