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MB91155 Datasheet(PDF) 46 Page - fujitsu semiconductor |
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MB91155 Datasheet(HTML) 46 Page - fujitsu semiconductor |
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46 / 105 page  MB91F155A/MB91155/MB91154 46 • Block Diagram MD1 MD0 CS2 CS1 CS0 SCKE SOE PEN P SBL CL A /D REC RXE TXE PE ORE FRE RDRF TDRE BDS RIE TIE SIDR0 to SIDR3 Internal data bus SODR0 to SODR3 Sending start Reception error Generated signals (to the CPU) (SCK0 to SCK3) Pin Receive clock Send clock Start bit detection circuit Receive bit counter Receive parity counter Receive shift register Receiving control circuit Sending start circuit Send bit counter Send parity counter Send shift register Sending control circuit Pin Received status determination circuit SMR 0 - 3 registers SCR 0 - 3 registers SSR 0 - 3 registers Clock selector Dedicated baud rate generator 16-bit reload timer Control bus Receive interrupt signal #26 to 29 * Send interrupt signal #31 to 34 * (SIN0 to SIN3) (SOT0 to SOT3) Pin * : Interrupt numbers |
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