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MB91155 Datasheet(PDF) 96 Page - fujitsu semiconductor |
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MB91155 Datasheet(HTML) 96 Page - fujitsu semiconductor |
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96 / 105 page  MB91F155A/MB91155/MB91154 96 (9) DMA Controller Timing (VCC = 3.15 V to 3.6 V, VSS = AVSS = 0 V, TA = 0 °C to +70 °C) Parameter Symbol Pin name Condition Value Unit Remarks Min Max DREQ input pulse width tDRWH DREQ0 to DREQ2 2 tCYC ns DACK delay time (typical bus) (typical DRAM) tCLDL CLK DACK0 to DACK2 6ns tCLDH 6ns DEOP delay time (typical bus) (typical DRAM) tCLEL CLK DEOP0 to DEOP2 6ns tCLEH 6ns DACK delay time (Single Dram) (Hyper Dram) tCHDL CLK DACK0 to DACK2 n / 2 × tCYC ns tCHDH 6ns DEOP delay time (Single Dram) (Hyper Dram) tCHEL CLK DEOP0 to DEOP2 n / 2 × tCYC ns tCHEH 6ns CLK VOL VOL VOH VOH VIH VIH tCLEL tCLDL tCLEH tCLDH tCHDH tCHDL tCHEL tDRWH VOH VOL VOL VOH tcyc DACK0 to DACK2 DEOP0 to DEOP2 (Typical bus) (Typical DRAM) DACK0 to DACK2 DEOP0 to DEOP2 ( Single DRAM ) ( Hyper DRAM ) DREQ0 to DREQ2 |
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