MB91155 datasheet(57/105 Pages) FUJITSU

Electronic Components Datasheet Search

MB91155 Datasheet(PDF) 57 Page - fujitsu semiconductor

Part #	MB91155

Description	32-bit Proprietary Microcontrollers

PDF	105 Pages

Scroll/Zoom	100%

Manufacturer	FUJITSU [fujitsu semiconductor]

Direct Link

Logo

57 / 105 page

MB91F155A/MB91155/MB91154

Interrupt Controller

The interrupt controller accepts and arbitrates interrupts.

• Block Diagram

to LEVEL0*4

NMI processing

Level

determination

Vector

determination

Priority determination

INT0*2

NMI*6

RI00

RI47

(DLYIRQ)

DLYI*1

ICR00

ICR47

Request to

withdraw

HLDREQ

R bus

LEVEL4

HLDCAN*3

to VCT0*5

VCT5

*1 : DLY1 represents the delay interrupt module (delay interrupt generator) . (For detailed information, see

section 10, “Delay Interrupt Module.”

*2 : INT0 is a wake-up signal for the clock controller in sleep or stop mode.

*3 : HLDCAN is a bus surrender request signal for bus masters except for the CPU.

*4 : LEVEL 4 - 0 are interrupt level outputs.

*5 : VCT 5 - 0 are interrupt vector outputs.

*6 : This product type does not have the NMI function.

Does ALLDATASHEET help your business so far? [ DONATE ]
About Alldatasheet \| Advertisement \| Contact us \| Privacy Policy \| Link to Datasheet \| Link Exchange \| Manufacturer List All Rights Reserved©Alldatasheet.com
Mirror Sites English : Alldatasheet.com \| English : Alldatasheet.net \| Chinese : Alldatasheetcn.com \| German : Alldatasheetde.com \| Japanese : Alldatasheet.jp Russian : Alldatasheetru.com \| Korean : Alldatasheet.co.kr \| Spanish : Alldatasheet.es \| French : Alldatasheet.fr \| Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com \| Polish : Alldatasheet.pl \| Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in \| Mexican : Alldatasheet.com.mx \| British : Alldatasheet.co.uk \| New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com \| icmetro.com

Does ALLDATASHEET help your business so far? [ DONATE ]

Family Site : ic2ic.com | icmetro.com