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MB91155 Datasheet(PDF) 87 Page - fujitsu semiconductor |
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MB91155 Datasheet(HTML) 87 Page - fujitsu semiconductor |
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87 / 105 page  MB91F155A/MB91155/MB91154 87 The relationship between the X0 input and the internal clock set with the CHC/CCK1/CCK0 bit of the GCR (Gear Control Register) is as shown next. tCYC tCYC tCYC tCYC tCYC tCYC tCYC tCYC X0 input • Source oscillation × 1 (GCR CHC bit : 0) (a) Gear × 1 internal clock CCK1/0 : 00 (b) Gear × 1/2 internal clock CCK1/0 : 01 (c) Gear × 1/4 internal clock CCK1/0 : 10 (d) Gear × 1/8 internal clock CCK1/0 : 11 • Source oscillation × 1/2 (GCR CHC bit : 1) (a) Gear × 1 internal clock CCK1/0 : 00 (b) Gear × 1/2 internal clock CCK1/0 : 01 (c) Gear × 1/4 internal clock CCK1/0 : 10 (d) Gear × 1/8 internal clock CCK1/0 : 11 |
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