DM368ZCEZ datasheet(74/208 Pages) TI1

74 / 208 page

TMS320DM368

SPRS668C

– APRIL 2010 – REVISED JUNE 2011

www.ti.com

5.3

Electrical Characteristics Over Recommended Ranges of Supply Voltage

and Operating Case Temperature (Unless Otherwise Noted)

PARAMETER

TEST CONDITIONS (1)

MIN

TYP

MAX

UNIT

High-level output voltage

VDDS33 = MIN, IOH = -2mA

2.4

(3.3V I/O)

High-level output voltage

VOH

VDDS33 = MIN, IOH = -100μA

2.94

(3.3V I/O)

High-level output voltage

VDDS18 -

VDDS18 = MIN, IOH = -2mA

(1.8V I/O)

0.45

Voltage

Output(2)

Low-level output voltage

VDDS33 = MIN, IOL = 2mA

0.4

(3.3V I/O)

Low-level output voltage

VOL

VDDS33 = MIN, IOL = 100μA

0.2

(3.3V I/O)

Low-level output voltage

VDDS18 = MIN, IOH = 2mA

0.45

(1.8V I/O)

Input current for I/O without

VI = VSS to V DD

±10

internal pull-up/pull-down

Input current for I/O with

II(pullup)

VI = VSS to VDD

100

internal pull-up(3) (4)

Input current for I/O with

Current

II(pulldown)

VI = VSS to VDD

-100

μA

internal pull-down(3) (4)

Input/Output

IOH

High-level output current

All peripherals

-4000

IOL

Low-level output current

All peripherals

4000

VO = VDD or VSS

IOZ

(5)

I/O off-state output current

±20

(internal pull disabled)

Input capacitance

Capacitance

Output capacitance

Resolution

Bits

RLOAD = 75 Ω

INL

Integral non-linearity, best fit

-1.5

1.5

LSB

(video buffer disabled)

RLOAD = 75 Ω

DNL

Differential non-linearity

-1

LSB

(video buffer disabled)

HD 3CH

DAC

VOUT

Output compliance range

IFS = 6.67 mA, RLOAD = 75 Ω

VREF

ZSET

Zero Scale Offset Error

0.5

G_ERR

Gain Error

-5

Ch_match

Channel matching

+/-2

Output high voltage

VOH(VIDBUF)

1.35

(top of 75% NTSC or PAL colorbar)

Output low voltage

VOL(VIDBUF)

0.35

Video Buffer

(bottom of sync tip)

RES

Resolution

bits

VOUT

Output Voltage

RLOAD = 75 Ω

0.35

1.35

(1)

For test conditions shown as MIN, MAX, or NOM, use the appropriate value specified in the recommended operating conditions table.

(2)

These I/O specifications apply to regular 3.3 V and 1.8V I/Os and do not apply to DDR2/mDDR, USB I/Os. DDR2/mDDR I/Os are 1.8 V

I/Os and adhere to JESD79-2A standard, USB I/Os adhere to USB2.0 spec.

(3)

This specification applies only to pins with an internal pullup (PU) or pulldown (PD). See or Section 2.8 for pin descriptions.

(4)

To pull up a signal to the opposite supply rail, a 1 k

Ω resistor is recommended.

(5)

IOZ applies to output only pins, indicating off-state (Hi-Z) output leakage current.

Device Operating Conditions

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