I960 datasheet(14/70 Pages) INTEL

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i960® Rx I/O Processor at 3.3 V

ADVANCE INFORMATION

3.0

PACKAGE INFORMATION

3.1

Package Introduction

The 80960Rx is offered in a SuperBGA* Ball Grid

Array (HL-PBGA) package. This is a perimeter array

package with four rows of ball connections in the

outer area of the package. See Figure 4, 352L HL-

PBGA Package Diagram (Bottom View) (pg. 22).

Section

3.1.1,

Functional

Signal

Definitions

describes signal function; Section 3.1.2, 352-Lead

HL-PBGA Package defines the signal and ball loca-

tions.

3.1.1

Functional Signal Definitions

Table 3 presents the legend for interpreting the Type

Field in the following tables. Table 4 defines signals

associated with the bus interface. Table 5 defines

signals associated with basic control and test func-

tions. Table 6 defines signals associated with the

Interrupt Unit. Table 7 defines PCI signals. Table 8

defines Memory Controller signals. Table 9 defines

DMA, APIC and I

2C signals. Table 10 defines clock

signals. Table 11 defines ICE signals.

Table 3. Signal Type Definition

Symbol

Description

Input signal only.

Output signal only.

I/O

Signal can be either an input or output.

Open Drain signal.

–

Signal must be connected as described.

S (...)

Synchronous. Inputs must meet setup

and hold times relative to S_CLK.

S(E) Edge sensitive input

S(L) Level sensitive input

A (...)

Asynchronous. Inputs may be

asynchronous relative to S_CLK.

A(E) Edge sensitive input

A(L) Level sensitive input

R (...)

While the P_RST# signal is asserted,

the signal:

R(1) is driven to VCC

R(0) is driven to VSS

R(Q) is a valid output

R(Z) Floats

R(H) is pulled up to VCC

R(X) is driven to an unknown state

H (...)

While the 80960Rx is in the hold state,

the signal:

H(1) is driven to VCC

H(0) is driven to VSS

H(Q) Maintains previous state or

continues to be a valid output

H(Z) Floats

P (...)

While the 80960Rx is halted, the signal:

P(1) is driven to VCC

P(0) is driven to VSS

P(Q) Maintains previous state or

continues to be a valid output

K (...)

While the Secondary PCI Bus is being

parked, the signal:

K(Z) Floats

K(Q) Maintains previous state or

continues to be a valid output

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