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I960 Datasheet(PDF) 41 Page - Intel Corporation |
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I960 Datasheet(HTML) 41 Page - Intel Corporation |
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41 / 70 page ![]() i960 ® Rx I/O Processor at 3.3 V ADVANCE INFORMATION 35 4.3 Targeted DC Specifications Table 18. DC Characteristics Symbol Parameter Min Max Units Notes VIL Input Low Voltage -0.5 0.8 V (1) VIH1 Input High Voltage for all signals except SCLK 2.0 VCC + 0.5 V (1) VIH2 Input High Voltage for SCLK 2.1 VCC + 0.5 V (1) VOL1 Output Low Voltage Processor signals 0.45 V IOL = 6 mA (3) VOH1 Output High Voltage Processor signals 2.4 VCC - 0.5 VIOH = -2 mA (3) IOH = -200 µA (3) VOL2 Output Low Voltage PCI signals 0.55 V IOL = 6 mA (1) VOH2 Output High Voltage PCI signals 2.4 V IOH = -2 mA (1) VOL3 Output Low Voltage Memory Controller Normal drive 0.45 V IOL = 6 mA (4) VOH3 Output High Voltage Memory Controller Normal drive 2.4 V IOH = -2 mA (4) VOL4 Output Low Voltage Memory Controller High Drive 0.45 V IOL = 7 mA VOH4 Output High Voltage Memory Controller High Drive 2.4 V IOH = -2 mA VOL5 Output Low Voltage APIC Data Lines 0.45 V IOL = 10 mA CIN Input Capacitance - HL-PBGA 10 pF FS_CLK = TF Min (1, 2) COUT I/O or Output Capacitance - HL-PBGA 10 pF FS_CLK = TF Min (1, 2) CCLK S_CLK Capacitance - HL-PBGA 5 12 pF FS_CLK = TF Min (1, 2) CIDSEL IDSEL Ball Capacitance 8 pF (1) LPIN Ball Inductance 20 nH (1) NOTES: 1. As required by the PCI Local Bus Specification Revision 2.1. 2. Not tested. 3. Processor signals include AD31:0, ALE, ADS#, BE3:0#, WIDTH/HLTD0, WIDTH/HLTD1/RETRY, D/C#/RST_MODE#, W/R#, DT/R#, DEN#, BLAST#, LRDYRCV#, LOCK#/ONCE#, HOLD, FAIL#, TDO, DACK#, WAIT#, SDA, SCL. 4. Memory Controller signals include MA11:0, DP3:0, RAS3:0#, CAS7:0#, MWE3:0#, DWE1:0#, DALE1:0, CE1:0#, LEAF1:0#. 5. Memory Controller signals capable of high drive are MA11:0, CAS7:0#, RAS3:0#, DWE1:0#. |
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